Analyze power consumption of new and existing micro architectural features of Next Generation High Performance CPU Cores. Analyze power characteristics of the latest Server/Client CPU workloads and use the data to influence microarchitecture decisions. Collaborate with the RTL team to improve the implementation. Asist them in interpreting power analysis results from tools

Develop and run tools, infrastructure, processes and flows to enable functional verification in the emulation environment Develop emulation testbench components to stimulate and monitor the Device Under Test Maintain and improve emulation infrastructure and methodology. Develop and execute on verification test plans in emulation environments Develop, simulate and debug di

Build system level channel simulations to ensure packages and PCBs are designed well and meet required SI/PI specifications. Review layouts to determine any areas that require additional refinement. Extract models for package, PCB and Sockets from vendors, collecting standardized models if available, and running through simulation. Run channel simulations to generate perf

Establish IP architecture project plans, milestones, and deliverables Utilize already established architecture development processes, and tangibly contributes to process improvements for higher efficiency. Creates JIRA projects & dashboards, and tracks feature development. Establish requirement to feature traceability via Jama and Jira Identifies, tracks, and mitigates pr

Manage inventory levels across multiple business units, ensuring optimal stock levels while minimizing excess inventory and carrying costs. Coordinate testing activities in laboratory environments, ensuring timely completion and accurate reporting of results. Allocate systems and resources according to the needs of various business units, balancing priorities and optimizi

Mentor and help with test and design debug, gather and update status and escalate issues to swim lane leads Tracking and updating master test plan and to detail issues in JIRA Work with Firmware, SOC Design and other Emulation engineers to debug and drive tests to completion Responsible for the design and development of test environment components to support the pre silic

Conduct full review of existing HPC EDA infrastructure with grid, OS, and EDA tools teams as well as engineering technical leaders and re architect the future global hybrid on prem and multi cloud HPC infrastructure that is highly efficient, utilized, scalable, and cost effective. Propose innovative approaches and work collaboratively with peer teams to maximize grid perf

Be the primary point of contact for consolidating and disseminating competitive information related to AECG Adaptive SoC products, both internally and externally Develop and maintain compelling competitive collateral for AMD Adaptive SoC portfolio Provide the first line of response to sales and field teams by providing detailed competitive analysis that quantifies AMD Ada

Contribute, develop and enhance a Clang/LLVM based compiler toolchain targeting a unique VLIW architecture Take responsibility for continuous development, debugging and testing of the code you produce Collaborate closely with multiple teams to deliver key solutions to challenging, unsolved problems PREFERRED EXPERIENCE Expert knowledge and hands on experience in C++, idea

Build system level channel simulations to ensure packages and PCBs are designed well and meet required SI/PI specifications. Review layouts to determine any areas that require additional refinement. Extract models for package, PCB and Sockets from vendors, collecting standardized models if available, and running through simulation. Run channel simulations to generate perf

Lead RTL design development for USB IP blocks in Verilog HDL, make sure functional correctness, and reusability for different product lines Work in close collaboration with the design engineering teams, managers, and directors on the various efforts involved in IP development and integration Responsible for projects of significant strategies to meet AMD roadmap Responsibl

Provide compensation analysis, benchmarking, data modeling, reporting, and problem solving in support of the company's overall corporate compensation program Support administration of the merit, stock and incentive planning processes, including system testing and audit reviews of employee data Assist in communicating programs and training employees in compensation systems

WHAT YOU DO AT AMD CHANGES EVERYTHING We care deeply about transforming lives with AMD technology to enrich our industry, our communities, and the world. Our mission is to build great products that accelerate next generation computing experiences the building blocks for the data center, artificial intelligence, PCs, gaming and embedded. Underpinning our mission is the AMD

WHAT YOU DO AT AMD CHANGES EVERYTHING We care deeply about transforming lives with AMD technology to enrich our industry, our communities, and the world. Our mission is to build great products that accelerate next generation computing experiences the building blocks for the data center, artificial intelligence, PCs, gaming and embedded. Underpinning our mission is the AMD

This individual will work with engineering management to drive execution excellence, including key metrics performance, schedule, cost, quality. This individual will work collaboratively with the AMD Program Management community on continuous process improvement. Ensure the team operates within budget and resource limitations Ability to make any operational improvements,